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An Updated Front-End Data Link Design for the Phase-2 Upgrade of the ATLAS Tile Calorimeter
Stockholm University, Faculty of Science, Department of Physics.ORCID iD: 0000-0001-7734-7617
Stockholm University, Faculty of Science, Department of Physics.ORCID iD: 0000-0001-9931-2896
Stockholm University, Faculty of Science, Department of Physics.
2017 (English)In: 2017 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC): Conference Proceedings, IEEE Computer Society, 2017Conference paper, Published paper (Other academic)
Abstract [en]

We present a new design for the advanced Link Daughter Board (DB) for the front-end electronics upgrade of the ATLAS hadronic Tile Calorimeter. The DB provides control, configuration and continuous ADC readout for the front-end through bi-directional multi-GB/s optical links with the off-detector readout system. The DB will operate in high luminosity LHC conditions with limited detector access, so the design is fault tolerant with a high level of redundancy to avoid single-point failure modes. The new design is based on the new Xilinx Kintex Ultrascale+ FPGA family, which provides improved high-speed link timing performance and radiation tolerance, as well as better signal compatibility with the CERN-developed GBTx link and timing distribution ASICs. Two GBTx ASICs each provide redundant phase-adjusted, LHC synchronous clocks, parallel control buses and remote JTAG configuration access to the two FPGAs on the DB.

Place, publisher, year, edition, pages
IEEE Computer Society, 2017.
Series
Nuclear Science Symposium & Medical Imaging Conference, ISSN 1082-3654, E-ISSN 2577-0829
Keywords [en]
Daughterboard, HL-LHC, Radiation Tolerant, GBTx, Ultrascale+, TileCal, Upgrade, ATLAS
National Category
Accelerator Physics and Instrumentation
Research subject
Physics
Identifiers
URN: urn:nbn:se:su:diva-175366DOI: 10.1109/NSSMIC.2017.8533116ISBN: 978-1-5386-2283-4 (print)ISBN: 978-1-5386-2282-7 (electronic)OAI: oai:DiVA.org:su-175366DiVA, id: diva2:1363019
Conference
2017 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), Atlanta, USA, 21-28 October, 2017
Available from: 2019-10-22 Created: 2019-10-22 Last updated: 2019-12-10Bibliographically approved
In thesis
1. Development of the read-out link and control board for the ATLAS Tile Calorimeter Upgrade
Open this publication in new window or tab >>Development of the read-out link and control board for the ATLAS Tile Calorimeter Upgrade
2019 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The Phase-II upgrade plan for the ATLAS Hadronic Tile Calorimeter facing the High-Luminosity LHC (HL-LHC) era includes approximately 1000 radiation tolerant read-out link and control boards (Daughterboards) that will provide full-granularity digital data to a fully-digital trigger system off-detector through multi-Gbps optic fibres. Different Daughterboard (DB) revisions have been developed, each successively aiming to meet the demanding HL-LHC requirements. The DB communicates with the off-detector systems via four 9.6 Gbps uplinks and two 4.8 Gbps downlinks. The DB performs high-speed read-out of digitized Photomultiplier (PMT) samples, while receiving and distributing configuration, control and LHC-synchronous timing to the front-end system. The design aims to minimize radiation-induced errors and enhance data reliability by embracing a fully double redundant design using CERN radiation hard GBTx ASICs and Xilinx FPGAs, implementing Triple Mode Redundancy (TMR), adopting Soft Error Mitigation (SEM) to correct for configuration memory Single Event Upsets (SEU), and employing Cyclic Redundancy Check (CRC) and Forward Error Correction (FEC) in the data format of the uplink and downlink, respectively. Total Ionizing Dose (TID), Non-Ionizing Energy Losses (NIEL) and Single Event Effects (SEE) radiation tests have been performed in order to assess the radiation tolerance strategies followed in the design and to qualify the DB for the HL-LHC requirements according to the ATLAS policy on radiation tolerant electronics. This thesis presents the author's contribution to the development of the DB through the different revisions, the integration of the DB to the Demonstrator and the radiation tests performed aiming to demonstrate the readiness of the DB to withstand the radiation requirements imposed by the HL-LHC. Resulting of this document, the author proposes strategies to be used in the new DB design moving forward the final design to be produced and inserted in ATLAS during the 2024-2026 period.

Place, publisher, year, edition, pages
Stockholm: Department of Physics, Stockholm University, 2019. p. 97
Keywords
HL-LHC, ATLAS, Tile Calorimeter, TileCal, Demonstrator, Daughterboard, Read-out, Digital electronics, Data acquisition, Radiation tolerant, GBTx, TID, NIEL, SEU, SEL, FPGA, Kintex 7, Ultrascale, Ultrascale+, Optic Links
National Category
Accelerator Physics and Instrumentation
Research subject
Physics
Identifiers
urn:nbn:se:su:diva-175246 (URN)978-91-7797-895-4 (ISBN)978-91-7797-896-1 (ISBN)
Public defence
2019-12-10, sal FB54, AlbaNova universitetscentrum, Roslagstullsbacken 21, Stockholm, 09:00 (English)
Opponent
Supervisors
Available from: 2019-11-15 Created: 2019-10-22 Last updated: 2019-11-12Bibliographically approved

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