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Erratum: Optimizing latency in Xilinx FPGA implementations of the GBT
Stockholm University, Faculty of Science, Department of Physics.
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2011 (English)In: Journal of Instrumentation, ISSN 1748-0221, Vol. 6, E05001Article in journal (Refereed) Published
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2011. Vol. 6, E05001
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Physical Sciences
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URN: urn:nbn:se:su:diva-68123DOI: 10.1088/1748-0221/6/05/E05001ISI: 000294491900001OAI: diva2:472227

authorCount :5

This is an Erratum for the article 2010 JINST 5 C12017

Available from: 2012-01-03 Created: 2012-01-03 Last updated: 2015-04-16Bibliographically approved

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Muschter, SteffenBohm, Christian
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