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An FPGA based backup version of the TileCal Digitizer
Stockholm University, Faculty of Science, Department of Physics.
Stockholm University, Faculty of Science, Department of Physics.
Stockholm University, Faculty of Science, Department of Physics.
2010 (English)In: Journal of Instrumentation, ISSN 1748-0221, E-ISSN 1748-0221, Vol. 5, C11020Article in journal (Refereed) Published
Abstract [en]

The ATLAS Tile Calorimeter front end digitization and readout system comprises about 1800 digitizer boards with two TileDMU ASICs on each board. The TileDMUs are responsible for storing, derandomising and reading out digitized data from twelve ADCs. An ample number of board spares are available. However, a backup solution is desirable in the event of unexpected failure modes. The original version contains both outdated and custom made circuits that are difficult or impossible to find in sufficient numbers. We have developed a new version using inexpensive off the shelf FPGAs (Spartan 6). The FPGAs have all the necessary functionality to emulate the TileDMU and will be readily available for a considerable time. The new board is functionally compatible with the current version and to a large extent uses the same code. The design goal was to leave the digitizer design as intact as possible since it is well tested and performs well. As radiation tolerance is an issue we have implemented triple mode redundancy in the FPGA. To further improve the system we added in system programmability via TTCrx for both the FPGA and the configuration memory using one way JTAG. This provides a way to recover from radiation damage to the configuration PROM or to remotely upgrade system firmware.

Place, publisher, year, edition, pages
2010. Vol. 5, C11020
Keyword [en]
Radiation-hard electronics, Front-end electronics for detector readout, Data acquisition circuits
National Category
Physical Sciences
Research subject
Physics
Identifiers
URN: urn:nbn:se:su:diva-116248DOI: 10.1088/1748-0221/5/11/C11020OAI: oai:DiVA.org:su-116248DiVA: diva2:805765
Available from: 2015-04-16 Created: 2015-04-16 Last updated: 2017-12-04Bibliographically approved
In thesis
1. Readout link and control board for the ATLAS Tile Calorimeter upgrade
Open this publication in new window or tab >>Readout link and control board for the ATLAS Tile Calorimeter upgrade
2015 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The Large Hadron Collider (LHC) at the CERN laboratory was designed to study the elementary particles and forces and search for new physics.  Detectors at LHC were designed to observe proton-proton collisions with center of mass energies up to 14 TeV, seven times higher than previously possible. One of the largest of these is the general purpose detector ATLAS. After almost 20 years of planning and construction, LHC and its detectors were finished in 2008. Since then ATLAS has produced valuable data, which contributed to the discovery of the 1964 postulated Higgs-particle and thus to the Nobel prize in physics in 2013. To expand the searches, LHC and its detectors will undergo several upgrades to the increase luminosity at least by a factor of 5 and to exploit the full potential of the machine. In order to adapt the detector to the resulting increasing event rates and radiation levels, new electronics have to be developed.

This thesis describes the development process of a new upgraded digital readout system for one of the sub-detectors in ATLAS, the scintillating Tile Calorimeter (TileCal), and more specifically one of its key components, the high-speed data link DaughterBoard. Starting from the idea of transferring all recorded information of the detector using high speed serial optical links and the concept of using re-programmable logic for the readout electronics, completely new on-detector electronics were designed to be used as a core component for communication, control and monitoring. The electronics was tested, electrical characterized and proven to work in a setup similar to the upgraded readout electronics. The DaughterBoard is the Stockholm University contribution to the ATLAS upgrade in 2023.

Place, publisher, year, edition, pages
Stockholm: Department of Physics, Stockholm Univeristy, 2015. 111 p.
Keyword
Digital electronics, FPGA, Data acquisition, Detector readout
National Category
Physical Sciences
Research subject
Physics
Identifiers
urn:nbn:se:su:diva-116258 (URN)978-91-7649-177-5 (ISBN)
Public defence
2015-05-28, sal FB42, AlbaNova universitetscentrum, Roslagstullsbacken 21, Stockholm, 13:00 (English)
Opponent
Supervisors
Available from: 2015-05-06 Created: 2015-04-16 Last updated: 2015-06-24Bibliographically approved

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